BASIC ASM SYNTAX DIFFERENCES
PORTING KEIL A51 → SDAS ASM
(Note that SDAS is based on AS8051)

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How to convert Keil A51 code to SDAS asm code so it can be compiled in SDCC!
Of course this relates solely to MCS51 aka 8051 MCU assembly language source.

Source code file name:

If your ASM source code filename in Keil is FileName.A51
Then the equivalent SDCC filename will be FileName.asm

General conversions:

1A7H0x1A7
EQU.EQU
<>ne
==eq
>gt
<lt
>=ge
<=le
IF.IF
ELSE.ELSE
ENDIF.ENDIF
NAME.MODULE
LOW<
HIGH>
PUBLIC.GLOBL
XTRN.GLOBL   optional in sdas
END;END   marks end of source file
$.   current location counter
JMPSJMP | LJMP   not automatic in sdas
USING.USING   except for interrupts
DB.DB   bits too since they occupy 1 address
Labels cannot start with $$ or ‹0~9› or ? in sdas
USING   just tells Keil which register set is active.

Symbol declaration:

EQU one time typeless → .EQU
CODE one time code address → .EQU
DATA one time data address → .EQU
IDATA one time idata address → .EQU
XDATA one time xdata address → .EQU
BIT one time bit address → .EQU
SET re-definable → ????????????????
LIT text strings → ????????????????

Memory reservation:

DBIT.DS   bit areas only
DS.DS   byte
DSB.DS   byte
DSW.BLKW   word
DSD.BLK4   dword

Memory initialization:

DB byte in ROM → .DB
DW word in ROM → .DW
DD dword in ROM → .4BYTE
EVEN tells assembler to start aligning on a word boundary

Absolute segment to area:

BSEG AT ‹address›.AREA ‹name› (ABS,BIT) plus .ORG ‹address›
CSEG AT ‹address›.AREA ‹name› (ABS,CODE) plus .ORG ‹address›
DSEG AT ‹address›.AREA ‹name› (ABS,DATA) plus .ORG ‹address›
ISEG AT ‹address›.AREA ‹name› (ABS,DATA) plus .ORG ‹address›
XSEG AT ‹address›.AREA ‹name› (ABS,XDATA) plus .ORG ‹address›
Note that using .ORG will likely create address space gaps.

Generic segment to area:
SEGMENT → .AREA ‹name› (REL|ABS,CON|OVR,PAG,BIT|CODE|DATA|XDATA)
RSEG ‹name›.AREA ‹name› (re-selects the area)
AT.ORG

Predefined areas in SDCC or SDAS:

See SDCC source code file in src/mcs51/main.c
.AREA RSEG (ABS,DATA)   SFR's
.AREA REG_BANK_0 (OVR,DATA)   register bank 0
.AREA REG_BANK_1 (OVR,DATA)   register bank 1
.AREA REG_BANK_2 (OVR,DATA)   register bank 2
.AREA REG_BANK_3 (OVR,DATA)   register bank 3
.AREA DSEG (DATA)   data
.AREA OSEG (OVR,DATA)   overlay
.AREA SSEG (DATA)   mcu stack
.AREA STACK (DATA)   istack
.AREA XSTK (PAG,XDATA)   xstack
.AREA ISEG (DATA)   idata
.AREA IABS (ABS,DATA)   idata,data
.AREA BSEG (BIT)   bit
.AREA PSEG (PAG,XDATA)   pdata
.AREA XSEG (XDATA)   xdata
.AREA XABS (ABS,XDATA)   xdata,pdata
.AREA XISEG (XDATA)   initialized xdata
.AREA HOME (CODE)   home
.AREA GSINIT0 (CODE)   global static init
.AREA GSINIT1 (CODE)   global static init
.AREA GSINIT2 (CODE)   global static init
.AREA GSINIT3 (CODE)   global static init
.AREA GSINIT4 (CODE)   global static init
.AREA GSINIT5 (CODE)   global static init
.AREA GSINIT (CODE)   static
.AREA GSFINAL (CODE)   post-static
.AREA CSEG (CODE)   code
.AREA CONST (CODE)   constants
.AREA XINIT (CODE)   source for XISEG
.AREA CABS (ABS,CODE)   constant absolute

Other predefined areas:

HOME0 (ABS,CODE) appears if you change HOME (CODE) to HOME (ABS,CODE).
BSEG_BYTES (DATA) is calculated from BSEG (BIT) since they correspond.
BIT_BANK (OVR,DATA) is represented by T in BIT address space 0x20~0x2F,
each being a virtual bit-register bank which contains 8 virtual bit-registers b0~b7
that get pushed/popped in one go when used in re-entrant functions.
The T represents the bit-bank which contains 8 pseudo bit-registers like
the regular 4 banks of byte-registers. It is used by re-entrant functions
that need bit parameters or local bit variables. There are probably some
library functions that use it. As it is a bit bank it cannot be moved out
of the bit-addressable area.

Area types:

BITBIT
CODECODE
DATADATA
IDATADATA
XDATAXDATA
Default if unspecified will be CODE
except for hard-coded area names.

Area attributes:

REL | ABS   relocatable | absolute
CON | OVR   concatenate | overly
NOPAG | PAG   nonpaged | 256B-paged
BANK   named collection of Areas
Disallowed combinations ABS,CON
Ok are REL,CON   REL,OVR   ABS,OVR
Default if unspecified will be REL,CON

Area names:

Separate overlays by the same name
are merged based upon OVR vs CON.
Use of .ORG mandates area type ABS.
An overlay needs to be defined once
and can then be re-invoked by name.
Do NOT define customs names of type DATA or BIT
since these will collide with predefined areas.

Area example:
.AREA MY_PORT1 (ABS,CON,XDATA)
.AREA ROUTINE3 (REL,CON,CODE)

Banks:
Areas can be grouped into Banks
so they will be combined into
a single block of code and/or data.

Bank attributes:
BASE= base address of bank (dflt=0).
SIZE= maximum size of bank in bytes.
FSFX= filename suffix for the bank.
MAP= NOICE debug mapping parameter.

Bank example:
.BANK A1 (SIZE=0x1000,FSFX=_A1)

Linker Area Designations:
a_‹area› The starting address of the area.
l_‹area› The length of the area.
m_‹area›_n The boundary modulus of the area segment.
s_‹area›_n The starting address of the area segment.
The appended _n signifies the area segment number.

Download MCU Headers:

SDAS Headers (AS8051) for all Nuvoton MCUs.zip
SDAS Headers (AS8051) for all STC MUCs.zip

Download Example Code:

Led Blink example for N76E003 in SDAS asm.zip

Safety, accuracy and completeness of information provided herein is not guaranteed,
so be inspired by it but do not use it as a basis for experimentation or other actions.

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